Semiconductor memory

Static information storage and retrieval – Systems using particular element – Ferroelectric

Reexamination Certificate

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C365S154000

Reexamination Certificate

active

06914797

ABSTRACT:
First buffers of a first driver circuit generate voltages to be supplied to word lines, respectively. Second buffers of a second driver circuit operate in synchronization with the first buffers to generate voltages to be supplied to first substrate lines, respectively. Each second buffer, upon access to memory cells, supplies a voltage for lowering the threshold values of transfer transistors and driver transistors to its corresponding first substrate line, and supplies thereto a voltage for raising the threshold values of the transfer transistors and the driver transistors during standby. This can improve the operation speed at the time of accessing the memory cells and reduce the leak current during standby. This results in shortening the access time during the operation of the semiconductor memory and reducing the standby current during standby.

REFERENCES:
patent: 5477499 (1995-12-01), Van Buskirk et al.
patent: 5629888 (1997-05-01), Saito et al.
patent: 5986924 (1999-11-01), Yamada
patent: Hei 11-16363 (1999-01-01), None
patent: 2000-114399 (2000-04-01), None

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