Semiconductor memory

Details Semiconductor memory Semiconductor memory

1998-07-01

2001-11-27

Kim, Matthew (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S156000, C463S029000

Reexamination Certificate

active

06324626

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory, and particularly to a semiconductor memory that can effectively be used as a backup memory for storing data that is processed with the progress of a program being executed.
2. Description of the Prior Art
In general, it is possible to read data stored in a semiconductor memory simply by feeding it with an address signal and a read signal. In addition, most semiconductor memories are designed to be compatible between different manufacturers, that is, they are “standardized”. Unfortunately, this has been prompting illegal duplication of programs stored in semiconductor memories and thus unauthorized use of the functions such programs offer.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor memory with which it is difficult to illegally duplicate the program stored therein, and to provide a game cassette employing such a semiconductor memory.
Another object of the present invention is to provide a semiconductor memory that, when employed as a backup memory for storing data that is processed with the progress of a program being executed, makes it substantially impossible to execute an illegally duplicated program, and to provide a game cassette employing such a semiconductor memory.
To achieve the above objects, according to one aspect of the present invention, in a semiconductor memory that has, as part of its data storage means, an ID memory for storing data in a nonvolatile manner and has a comparing means for comparing the data stored in the ID memory with data entered from outside, and in which access to the portions of the data storage means other than the ID memory is permitted in accordance with the result of the comparison performed by the comparing means, the operation code for accessing the ID memory is different from the operation code for accessing the portions of the data storage means other than the ID memory, and the operation code for the ID memory is changed in accordance with the data stored in the ID memory.
This design, by demanding entry of the data stored in the ID memory, provides a protection against unauthorized access to the portions of the data storage means other than the ID memory, and in addition, by using different operation codes for the access to the ID memory and to the portions of the data storage means other than the ID memory, and by changing the operation code for the ID memory in accordance with the data stored in the ID memory, provides a protection against unauthorized access to the ID memory as well.
Moreover, according to another aspect of the present invention, a command decoder for decoding operation codes is composed of PLAs (programmable logic arrays) in such a way that the output corresponding to a specific operation code is changed in accordance with the data stored in the ID memory, and this specific operation code is allotted to the operation code for the ID memory.
This design makes it possible to change the operation code for the ID memory in accordance with the data stored in the ID memory without unduly increasing the complexity and scale of the circuit.
Moreover, according to another aspect of the present invention, a latching means for holding the data is provided so that, a predetermined time after the start of the supply of power, the data stored in the ID memory is read out so as to be held in the latch means, and that the output of the command decoder in response to the above-mentioned specific operation code is made to change in accordance with the data held in the latching means.
For example, a semiconductor memory such as an EEPROM is provided with a circuit for generating the high voltage required in writing and reading data to and from a memory array. This circuit is provided with a program timer for controlling the duration for which the generated high voltage is applied. Accordingly, this program timer can be used to control the timing with which the data stored in the ID memory is read out so as to be held in the latch means.
Moreover, according to another aspect of the present invention, when the data stored in the ID memory is outputted, the data is changed in accordance with itself.
This design provides a securer protection against unauthorized reading of data from the ID memory.


REFERENCES:
patent: 4614861 (1986-09-01), Pavlov et al.
patent: 4897875 (1990-01-01), Pollard et al.
patent: 5502445 (1996-03-01), Dingwall et al.
patent: 5599231 (1997-02-01), Hibino et al.
patent: 5671146 (1997-09-01), Windel et al.
patent: 5991194 (1999-11-01), Jigour et al.

Affiliated with

Also associated with

Rating

Semiconductor memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2585571