Semiconductor memory

Details Semiconductor memory Semiconductor memory

1988-05-20

1990-04-10

Popek, Joseph A.

Static information storage and retrieval

Addressing

Multiple port access

36518904, G11C 1134

Patent

active

049166697

ABSTRACT:
A semiconductor memory of a dual-port type which has input/output circuits and which has respective semiconductor memory units having a memory array of rows and columns of memory cells, a pluraliity of sense amplifiers coupled to one end of the memory array data lines and being respectively associated with individual pairs of complementary data lines, a row address decoder for selectively applying signals to the word lines, column switches for providing either selective or simultaneous connection of the plurality of complementary pairs of data lines to a pair of complementary common data lines, write amplifiers for supplying predetermined write signals to respective data lines via the common data lines and column switches, the sense amplifiers becoming operational during a predetermined mode of operation subsequent to the transfer of write signals to the data lines and the write signals being supplied from the write amplifiers are, furthermore, made to have a minute level equal to or greater than that of a typical readout signal from a memory cell.

REFERENCES:
M. Ishihara et al., "Dual Port Memory For 256K Image with Serial Input Function and Raster Operation Function", Nikkei Electronics, Mar. 24, 1986, published by Nikkei McGraw-Hill Co., Ltd., pp. 243-264.

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