Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1987-09-24
1989-07-18
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
36523001, 365201, 371 10, G11C 1140
Patent
active
048499390
ABSTRACT:
A semiconductor memory having a memory array, a first and a second selection line which are connected to a memory cell, and a selection means which selects either one of the selection lines. The selection means includes a selection circuit which optionally selects the first selection line or the second selection line when an address signal corresponding to the first selection line is aligned with a predetermined address signal.
REFERENCES:
patent: 4556975 (1985-12-01), Smith et al.
patent: 4567580 (1986-01-01), Varshney
"Nikkei Electronics", published by Nikkei McGraw-Hill, Jun. 3, 1985, pp. 209-231.
Kenmizaki Kanehide
Matsuura Hiromi
Muranaka Masaya
Okayama Osamu
Hitachi , Ltd.
Hitachi VLSI Engineering Corp.
Popek Joseph A.
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