Semiconductor memeory device in which writing is inhibited in ad

Details Semiconductor memeory device in which writing is inhibited in ad Semiconductor memeory device in which writing is inhibited in ad

1988-05-06

1990-08-07

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Signals

3652335, G11C 700

Patent

active

049473743

ABSTRACT:
In a static random access memory, when address signals change, one-shot pulses are responsively generated. A detection signal obtained by ORing the one-shot pulses is employed as an equalize signal. Potentials of a bit line pair is equalized in response to the equalize signal. A write inhibiting signal having a pulse width larger than that of the equalize signal is generated by a pulse width increasing circuit. A write operation of data is inhibited in response to the write inhibiting signal.

REFERENCES:
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patent: 4616344 (1986-10-01), Noguchi et al.
patent: 4707809 (1987-11-01), Ando
patent: 4744063 (1988-05-01), Ohtami et al.
patent: 4766572 (1988-08-01), Kobayashi
patent: 4802129 (1989-01-01), Hoekstra et al.

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