Semiconductor material on a substrate, said substrate comprising

Metal treatment – Barrier layer stock material – p-n type – With non-semiconductive coating thereon

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29576E, 29576T, 136245, 136258, 148DIG54, 357 59, 357 71, 428620, 430 5, 430296, 430942, H01L 2712, H01L 2904

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046392777

ABSTRACT:
There is disclosed a substrate having thereon a layer of a semiconductor material, and a method for depositing and heating the semiconductor material on the substrate, wherein the substrate comprises a layer of organic polymer, a layer of metal or metal alloy, and a layer of dielectric material wherein the layer of dielectric material has a surface, remote from the metal, that is contiguous with the semiconductor material.

REFERENCES:
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patent: 3700497 (1972-10-01), Epifano et al.
patent: 3914856 (1975-10-01), Fang
patent: 3961997 (1976-06-01), Chu
patent: 4028206 (1977-06-01), King
patent: 4040083 (1977-08-01), Saiki et al.
patent: 4059461 (1977-11-01), Fan et al.
patent: 4187126 (1980-02-01), Radd et al.
patent: 4341850 (1982-07-01), Coane
patent: 4433202 (1984-02-01), Maruyama et al.
Kaplan, L. H., "Metals as Resists for SiO.sub.2 Etching" I.B.M. Tech. Discl. Bull., vol. 12, No. 12, May 1970, p. 2087.
Research Disclosure No. 18136, vol. 181, May, 1979.
"Thermal Conductivity of Metallic Elements and Alloys", vol. 1, Thermophysical Properties of Matter, (1970) (title pages only).

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