Semiconductor manufacturing method

Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S463000, C438S464000

Reexamination Certificate

active

07737001

ABSTRACT:
In a stealth dicing process for a semiconductor device with a low dielectric constant layer, the occurrence of poor appearance such as a defective shape or discoloration in the layer is reduced or prevented as follows. A low dielectric constant layer is formed in an interlayer insulating layer formed on the main surface of a semiconductor wafer. A laser beam is focused on the inside of the wafer from the reverse side of the wafer in order to form modified regions selectively. Each modified region is formed in a way to contact, or partially get into, the low dielectric constant layer. In this formation process, the semiconductor wafer is cooled by a cooling element. This reduces or prevents discoloration of the low dielectric constant layer which might occur due to the heat of a laser beam.

REFERENCES:
patent: 5968382 (1999-10-01), Matsumoto et al.
patent: 6734083 (2004-05-01), Kobayashi
patent: 6756562 (2004-06-01), Kurosawa et al.
patent: 6992026 (2006-01-01), Fukuyo et al.
patent: 7141443 (2006-11-01), Nagai et al.
patent: 2004/0145028 (2004-07-01), Matsumoto et al.
patent: 2004/0164061 (2004-08-01), Takeuchi et al.
patent: 2004/0224483 (2004-11-01), Takyu et al.
patent: 2005/0006361 (2005-01-01), Kobayashi et al.
patent: 2005/0023260 (2005-02-01), Takyu et al.
patent: 2005/0110151 (2005-05-01), Tamura et al.
patent: 2005/0202596 (2005-09-01), Fukuyo et al.
patent: 2006/0128065 (2006-06-01), Inada et al.
patent: 7-256479 (1995-10-01), None
patent: 09-029472 (1997-02-01), None
patent: 2003-151924 (2003-05-01), None
patent: 2003-173988 (2003-06-01), None
patent: 2003-320466 (2003-11-01), None
patent: 2004-001076 (2004-01-01), None
patent: 2004-25187 (2004-01-01), None
patent: 2004-186635 (2004-07-01), None
patent: 2004-235626 (2004-08-01), None
patent: 2004-282037 (2004-10-01), None
patent: 2005-028438 (2005-02-01), None
patent: 2005-047290 (2005-02-01), None
patent: 2005-57257 (2005-03-01), None
Chinese Official Action dated Apr. 24, 2009, for Application No. 200610085089.1.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor manufacturing method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor manufacturing method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor manufacturing method will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4164637

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.