Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-10-10
2006-10-10
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S622000, C438S758000, C438S637000, C438S299000, C438S303000, C257S774000, C257S756000, C257SE21590
Reexamination Certificate
active
07119005
ABSTRACT:
An integrated circuit is provided. A gate dielectric and a gate are provided respectively on and over a semiconductor substrate. A junction is formed adjacent the gate dielectric and a shaped spacer is formed around the gate. A spacer is formed under the shaped spacer and a liner is formed under the spacer. A first dielectric layer is formed over the semiconductor substrate, the shaped spacer, the spacer, the liner, and the gate. A second dielectric layer is formed over the first dielectric layer. A local interconnect opening is formed in the second dielectric layer down to the first dielectric layer. The local interconnect opening in the first dielectric layer is opened to expose the junction in the semiconductor substrate and the first gate. The local interconnect openings in the first and second dielectric layers are filled with a conductive material.
REFERENCES:
patent: 6287951 (2001-09-01), Lucas et al.
patent: 6432784 (2002-08-01), Yu
Cheah Syn Kean
Chen Tong Qing
Gu Tian Hao
Han Zhi Yong
Ong Kelvin
Ahmadi Mohsen
Chartered Semiconductor Manufacturing Ltd.
Ishimaru Mikio
Lebentritt Michael
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