Semiconductor integrated circuit with solder bump

Active solid-state devices (e.g. – transistors – solid-state diode – With means to increase breakdown voltage threshold – In integrated circuit

Reexamination Certificate

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Details

C257S678000, C257S686000, C257S691000, C257S728000, C257S777000, C436S106000, C436S109000

Reexamination Certificate

active

07868409

ABSTRACT:
A semiconductor integrated circuit which is connected to a substrate by solder bumps wherein, when at least one solder bump is connected to a signal line of the semiconductor integrated circuit and the semiconductor integrated circuit is mounted on the substrate, the semiconductor integrated circuit is bonded to the substrate by the solder bump, and the interconnection to the substrate is made by dummy bumps forming wires at the substrate side.

REFERENCES:
patent: 5726492 (1998-03-01), Suzuki et al.
patent: 7279728 (2007-10-01), Itakura et al.
patent: 2004/0266160 (2004-12-01), Jao et al.
patent: 2005/0014476 (2005-01-01), Oono et al.
patent: 2006/0180928 (2006-08-01), Takahira
patent: 2006/0245308 (2006-11-01), Macropoulos et al.
patent: 2004-350117 (2004-12-01), None
patent: 2006-012990 (2006-01-01), None

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