Semiconductor integrated circuit with multiple write operation m

Details Semiconductor integrated circuit with multiple write operation m Semiconductor integrated circuit with multiple write operation m

1997-09-30

2000-07-18

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518522, G11C 1134

Patent

active

060916400

ABSTRACT:
A control of a flash memory includes control for supplying a pulse-shaped voltage to each of non-volatile memory cells until a threshold voltage of the non-volatile memory cell having a first threshold voltage is changed to a second threshold voltage. The control involves a first write mode (coarse write) in which the amount of change in threshold voltage of each non-volatile memory cell, which is varied each time the pulse-shaped voltage is applied, is relatively rendered high, and a second write mode (high-accuracy write) in which the amount of change in threshold voltage thereof is relatively rendered low. As compared with the high-accuracy mode, the number of pulses required to change the threshold voltage of each memory cell is smaller than that in the coarse write mode. Therefore, the number of verify operations at the time that the coarse write mode is used, is small and hence the entire write operation can be speeded up.

REFERENCES:
patent: 5218569 (1993-06-01), Banks
patent: 5412601 (1995-05-01), Sawada et al.
patent: 5440509 (1995-08-01), Momodomi et al.
Torelli et al. "An improved method for programming a word-erasable EEPROM", Alta Frequenza, vol. LII-N. 6, Nov.-Dec. 1983, pp. 487-494.
Tanaka et al, "High-Speed Programming and Program-Verify Methods Suitable for Low-Voltage Flash Memories", 1994 Symposium on Circuits, Digest of Technical Papers.

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