Electronic digital logic circuitry – Multifunctional or programmable – Array
Reissue Patent
2007-01-16
2007-01-16
Le, Don (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S101000
Reissue Patent
active
09963735
ABSTRACT:
The present invention relates to a semicustom ASIC, in which a plurality of standard cell rows are arranged. The standard cell and basic cells used in a gate array are mixedly mounted on the same chip. Respective cell rows are composed of a plurality of standard cells with an empty space. The basic cells used in the gate array are arranged as dummy cells. They are disposed in wiring channel regions between the plurality of standard cells or empty spaces between the standard cells in a same standard cell row. Only the latter may be used if the channelless type standard cells are employed. A changing request can be satisfied by forming metal wiring layers on the gate array basic cells when there is a necessity of changing circuit design or pattern. Since the circuit can be modified without change of gate polysilicon regions and source/drain regions underlying the metal wiring layers, design and manufacture can be effected in a short period of time.
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“A Versatile VLSI Design System for Combining Gate Array and Standard Cell Circuits on the Same Chip,” Robert Homung, Martine Bonneau and Bernard Waymel, IEEE 1987 Custom Integrated Circuits Conference, no month.
Fudanuki Nobuo
Sei Toshikazu
Foley & Lardner LLP
Kabushiki Kaisha Toshiba
Le Don
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