Semiconductor integrated circuit wiring design method and...

Details Semiconductor integrated circuit wiring design method and... Semiconductor integrated circuit wiring design method and...

2007-04-03

2007-04-03

Kik, Phallaka (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C700S121000, C700S098000, C700S118000, C438S129000, C438S130000

Reexamination Certificate

active

10972463

ABSTRACT:
The facility of operation in a manufacturing process and the reliability of the finished product can be improved by making a design based on two basic wiring pattern layers in which wiring traces are formed with regularity, and a basic via array layer inserted between the two basic wiring pattern layers, in which vias are formed with regularity

REFERENCES:
patent: 5798937 (1998-08-01), Bracha et al.
patent: 7007258 (2006-02-01), Li
patent: 2004/0255258 (2004-12-01), Li
patent: 11-312738 (1999-11-01), None

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