Semiconductor integrated circuit utilizing overdriven differenti

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit

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365207, G11C 700

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active

058319107

ABSTRACT:
A semiconductor integrated circuit is provided in which a differential amplifier circuit such as a sense amplifier is operated at high speed even if the operating voltage is reduced. To achieve this, a MOS transistor for supplying the operating voltage to a drive line on the high-potential side of a differential amplifier circuit is of N-channel type and the amplitude of a switching control signal for controlling this transistor is the potential of the step-up voltage produced by stepping up a supply voltage in level. The output voltage of an internal step-up circuit for achieving a word-line selection level is utilizable as the step-up voltage.

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Nakamura et al., FA14.2: A 29ns 64Mb DRAM with Hierarchical Array.
Architecture, 1995 IEEE Int'l Solid-State Circuits Conference.

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