Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-07-12
2005-07-12
Bonzo, Bryce P. (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S031000, C714S045000
Reexamination Certificate
active
06918058
ABSTRACT:
A semiconductor integrated circuit having: an internal main bus; first microprocessor and second microprocessor sharing the internal main bus; a first debug serial bus with one end thereof connected to said first microprocessor; a second debug serial bus with one end thereof connected to the second microprocessor; and a debugging module connected to the other ends of the first debug serial bus and second debug serial bus and transferring at least a debugging program and debugging data to the first microprocessor via said first debug serial bus and to the second microprocessor via the second debug serial bus.
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Miura Takashi
Miyamori Takashi
Bonzo Bryce P.
Kabushiki Kaisha Toshiba
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