Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-05-21
2003-12-02
Crane, Sara (Department: 2811)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06658639
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor integrated circuits and, more particularly, to a semiconductor integrated circuit provided with a circuit for determining a configuration of a functional block.
2. Description of the Background Art
A conventional semiconductor integrated circuit is provided with a separate determination circuit for obtaining configuration information on a functional block of the semiconductor integrated circuit, in addition to the functional block.
However, the above mentioned conventional determination circuit is arranged corresponding to a desired functional block (of a specific configuration), so that configuration information cannot be provided if the configuration of the functional block is not represented by a desired value.
We now consider the case where the functional block includes a plurality of elements, which are formed by a program (automatic circuit synthesis function) when a chip is formed. In this case, the configuration information, particularly an arrangement pattern, of the plurality of elements actually formed, cannot be determined until the chip is formed. Thus, a conventional determination circuit does not provide configuration information (arrangement pattern or the like) on the plurality of elements.
A similar problem is caused if a desired configuration is not achieved due to a design problem. In such a case, it is difficult to detect malfunction.
SUMMARY OF THE INVENTION
The present invention provides a semiconductor integrated circuit capable of reliably determining a configuration of a functional block.
The semiconductor integrated circuit according to one aspect of the present invention is provided with a functional block having a plurality of elements, which has a configuration determination circuit capable of determining a configuration of the plurality of elements because of the plurality of elements.
Preferably, the configuration determination circuit includes a plurality of determination circuits having substantially the same function.
Particularly, the plurality of determination circuits are electrically connected in accordance with the configuration of the plurality of elements.
The functions of the plurality of determination circuits are determined when the plurality of elements are formed on a semiconductor substrate, and determination is performed by the functions.
Preferably, the configuration determination circuit determines the number of elements and/or arrangement pattern of the plurality of elements.
Preferably, the configuration determination circuit is formed by interconnections. The plurality of determination circuits have substantially the same pattern of interconnections. Particularly, the interconnections are insulated from power supply lines.
Preferably, a terminal for inputting/outputting a signal for determination of the configuration of the plurality of elements in a test mode is further provided. In the test mode, the signal is input from the terminal to the configuration determination circuit, and the signal representing the determination result of the configuration determination circuit is output from the terminal.
Preferably, a power supply line is further provided for supplying power, and the configuration determination circuit is insulated from the power supply line.
According to the above mentioned semiconductor integrated circuit of the present invention, configuration information on the plurality of elements of the functional block can readily be determined by the configuration determination circuit of the plurality of elements.
Thus, even when the configuration of the plurality of elements is variable (when the plurality of elements are arranged automatically through a program), such configuration can be determined by the plurality of elements. Even when the plurality of elements are formed under control of the program when a chip is formed, the configuration thereof can be reliably determined. Particularly, the arrangement and the number of the plurality of elements can be determined as the configuration.
In addition, once the plurality of elements are formed, the internal configuration thereof needs not be changed, but their functions enable determination. Accordingly, subsequent change to the internal configuration is not necessary, and malfunction due to the changing operation (in programming) is prevented.
The determination circuit is formed in the plurality of elements, so that reliable determination is achieved while eliminating adverse affect by other internal circuits, elements, or the like.
Note that external application of a test signal allows the configuration of the functional block to be readily determined.
Further, the determination circuit can be formed by interconnections. Thus, malfunction of the determination circuit due to a design problem of an active element (such as a transistor) can be prevented.
Moreover, insulation from the power supply line eliminates adverse affect by the power supply line.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4155121 (1979-05-01), Jambotkar
patent: 9-55096 (1997-02-01), None
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