Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1994-04-07
1996-08-06
Grimm, Siegfried H.
Static information storage and retrieval
Read/write circuit
Data refresh
331 57, 331 66, 331175, 331176, 331186, 365227, G11C 11406, H03B 500
Patent
active
055441203
ABSTRACT:
A semiconductor integrated circuit includes a bias voltage regulation circuit having variable resistors which are provided between voltage output circuits of higher and lower potential sides and changes corresponding to a specified condition such as V.sub.CC and a temperature. The variable resistors and bias voltage output circuits form a V.sub.CC divider, and the variable resistors properly regulate a bias voltage supplied to an oscillation circuit corresponding to each of the specified conditions. Accordingly, if the oscillation circuit is used in an automatic refresh circuit of a PSRAM, an increase of a refresh operation frequency is suppressed regardless of an increase in V.sub.CC. Since a temperature depending variable resistor causes a resistance value to be reduced by the predetermined characteristics against the temperature increase, it is possible to set an oscillation frequency to provide a desired pause for guarantee of circuit operation. It is possible to provide a ring oscillator having a low dependency of the oscillation frequency on a power source voltage and a temperature characteristic, thereby decreasing its current consumption.
REFERENCES:
patent: 4853654 (1989-08-01), Sakurai
patent: 4939695 (1990-07-01), Isobe et al.
Kuwagata Masaaki
Maruyama Keiji
Matsuo Ryosuke
Miyawaki Naokazu
Ueno Hisashi
Grimm Siegfried H.
Kabushiki Kaisha Toshiba
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