Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate
2005-08-09
2005-08-09
Chang, Daniel (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
C326S016000, C326S046000, C327S141000, C365S189050, C714S734000
Reexamination Certificate
active
06927603
ABSTRACT:
A semiconductor integrated circuit having a system bus divided into stages and configured to transfer signals, stage elements configured to connect the stages in series and operate in a divided mode transferring signals from a stage on an input side to a stage on an output side in synchronization with a clock signal and in a through mode that always passes signals from the stage on the input side to the stage on the output side, and a plurality of function modules connected to the different stages.
REFERENCES:
patent: 5869979 (1999-02-01), Bocchino
patent: 6418545 (2002-07-01), Adusumilli
patent: 2003-139818 (2003-05-01), None
Chang Daniel
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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