Semiconductor integrated circuit having a plurality of chips

Details Semiconductor integrated circuit having a plurality of chips Semiconductor integrated circuit having a plurality of chips

1997-09-30

1999-11-09

Bragdon, Reginald G.

Electrical computers and digital processing systems: memory

Storage accessing and control

Memory configuring

711105, 711106, 711172, 365 51, G06F 1200

Patent

active

059833319

ABSTRACT:
A CPU acting as a mother chip, in combination with a DRAM acting as a subsidiary chip, is mounted. A mode output circuit is able to set the storage capacity of the DRAM as well as the refresh cycle of the DRAM for forwarding to a mode input circuit of the CPU through a mode output terminal of the DRAM and a mode input terminal of the CPU. The CPU controls an address generator according to the data from the mode input circuit, to set the number of bits of address data for access to the DRAM according to the DRAM storage capacity and the DRAM refresh cycle.

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Commercialization of Cost-Effective MCM for Mobile Communication Devices, Nikkei Microdevices, Feb. ,1994, pp. 90-91 and English Abstract.

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