Semiconductor integrated circuit having a function of reducing a

Details Semiconductor integrated circuit having a function of reducing a Semiconductor integrated circuit having a function of reducing a

1994-05-04

1995-05-30

Westin, Edward P.

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

327544, 365227, 365156, H03K 19096, H03K 301

Patent

active

054205280

ABSTRACT:
An IC is divided into four circuit blocks. These four circuit blocks have the same function. While one of the circuit blocks is not functioning, a mode setting circuit generates mode control signals for selecting a mode in which the operation frequency of the circuit block is set lower than in a normal operation mode. A main control circuit controls the entire operation of the IC, and generates clock signals for defining the operations of the circuit blocks. Sub-control circuits are arranged so as to correspond to the circuit blocks and receive their respective mode control signals and clock signals. Upon receiving the mode control signals, the sub-control circuits controls their corresponding circuit blocks as to whether the circuit blocks are operated in the normal operation mode or at a frequency lower than that in the normal operation mode. In the normal operation mode, the sub-control circuits each set the amount of direct current of a direct current supply circuit arranged in its corresponding circuit block to a normal value, in response to the mode control signals. In the special operation mode, the sub-control circuits each make the amount of direct current smaller than in the normal operation mode.

REFERENCES:
patent: 4760561 (1988-07-01), Yamamoto et al.
patent: 4999519 (1991-03-01), Kitsukawa et al.
patent: 5140557 (1992-08-01), Yoshida
patent: 5208558 (1993-05-01), Shigehara et al.
patent: 5324992 (1994-06-01), Maly

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