Semiconductor integrated circuit device with input-protecting ci

Details Semiconductor integrated circuit device with input-protecting ci Semiconductor integrated circuit device with input-protecting ci

1994-07-06

1996-12-03

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257356, 257357, 257360, 257368, 257369, 257370, H01L 2978

Patent

active

055811035

ABSTRACT:
A semiconductor integrated circuit device, comprises: an n.sup.+ -type buried layer 12 formed on a surface of a p-type semiconductor substrate 11; an n-type semiconductor layer 71 formed on the n.sup.+ -type buried layer 12; a first p type well 16 formed in the semiconductor layer 71; a second p-type well 18 formed in the semiconductor layer 71 and electrically isolated from the first p-type well 16; an input-protecting N-type MOS transistor 102 formed in the first p-type well 16 and having a drain 22 grounded, a source 25 connected to an input terminal 101 to which an external signal is input, and a gate 23 grounded; and an n.sup.+ -type impurity region 27 grounded and formed in the second p-type well 18. Whenever a negative surge voltage is applied to the input terminal 101, a current path is formed from the ground V.sub.SS to the input terminal 101, by way of the impurity region 27 formed in the second p-type well 18, the n.sup.+ -type buried layer 12, and the source 25 formed in the first p-type well 16, in addition to the current path through the input-protecting N-type MOS transistor 102 formed in the first p-type well 16, thus improving the input-protection characteristics of the circuits formed in the same semiconductor substrate against a surge voltage applied to the input terminal 101.

REFERENCES:
patent: 5148255 (1992-09-01), Nakazato et al.
patent: 5181091 (1993-01-01), Harrington, III et al.
Tampa, Nobuo, et al., "Session XIII: Static RAMs", Digest of Technical Papers, IEEE International Solid-State Circuits Conference, Feb. 18, 1988.

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