Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-06-06
2009-10-27
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C326S102000
Reexamination Certificate
active
07610572
ABSTRACT:
A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.
REFERENCES:
patent: 6888395 (2005-05-01), Mizuno et al.
patent: 2003-078009 (2003-03-01), None
patent: 2003-218682 (2003-07-01), None
Yusuke Kanno et al. , “μI/O Architecture for 0.13-μm Wide-Voltage-Range System-on-a-Package (SoP) Designs” 2002 Symposium on VLSI circuits Digest of Technical Papers, pp. 168 to 169, Jun. 2002.
Hirose Kenji
Irita Takahiro
Kanno Yusuke
Mizuno Hiroyuki
Yasu Yoshihiko
Miles & Stockbridge P.C.
Renesas Technology Corp.
Whitmore Stacy A
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