Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate
2000-06-23
2002-04-30
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
C326S112000, C326S095000
Reexamination Certificate
active
06380764
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device, particularly to a semiconductor integrated circuit device suitable for a high speed and low voltage operation, and a storage medium on which a cell library is stored.
2. Description of the Prior Art
There are widely used MOSFETs each having features of a high integration density and low consumption power, in semiconductor integrated circuit devices currently fabricated. A MOSFET has a threshold voltage by which ON-OFF characteristics of the FET are determined. In order to increase a drive ability and improve an operating speed in a circuit, there is a need for setting a threshold voltage to a low value.
However, when a threshold voltage is set to an excessively low value, there arise problems that an MOSFET cannot perfectly be turned off due to subthreshold characteristics (tailing characteristics) of the MOSFET, a subthreshold current (hereinafter “leakage current” is used) is increased and thereby consumption power is very large, as described in 1993 Symposium on VLSI Circuits Digest of Technical Papers, pp. 45-46 (May) 1993.
Generally, in order to increase a threshold voltage of a MOSFET, there have been employed methods in which a thicker gate oxide film is adopted or a higher impurity density is provided under a gate oxide film. In other words, in designing a semiconductor integrated circuit device which is constructed of MOSFETs, a desired operating frequency and consumption power are first considered and a threshold voltage is then determined, which is finally followed by determination of process conditions in semiconductor fabrication.
MOSFETs in a semiconductor integrated circuit device generally have a constant threshold voltage. According to an invention made in recent years, however, there has been proposed a semiconductor integrated circuit in which a substrate bias voltage is changed according to an operating state, standby or active, and thereby a threshold voltage of a MOSFET is controlled, as described in IEEE International Solid State Circuits Conference Digest of Technical Papers, pp. 166-167,1996.
According to the published Unexamined Japanese Patent Application No. Hei 8-274620, there has been proposed a technique that in the case where a semiconductor circuit is constructed with a plurality of functional blocks, a substrate bias voltage is independently selected in each functional block and a MOSFET with a low threshold voltage is provided in a block in whose operation a high speed is important, while a MOSFET with a high threshold voltage is provided in a block in whose operation a high speed is not important.
There has been a further proposal in IEEE Journal of Solid-State Circuit, Vol. 30, No. 8, pp.847-854, August 1995 that a power source supply line and a pseudo-power source supply line are provided in a circuit and a switching MOSFET is disposed therebetween, wherein a main circuit is supplied with a source voltage from the pseudo-power source supply line and in a standby state, the main circuit is not supplied with the source voltage by turning off the switching MOSFET, so that low consumption power is realized. In the article, there has also been proposed that the switching MOSFET has a higher threshold voltage as compared with MOSTETs constituting the main circuit in order that the switching MOSFET is kept the ON state in the active operating condition, while acting no switching.
As described above, there has been proposed in the prior art that a threshold voltage of a MOSFET is controlled by changing a substrate bias voltage according to operating states, standby or active; or a substrate bias voltage is independently selected in each functional block and a MOSFET with a low threshold voltage is provided in a block in whose operation a high speed is important, while a MOSFET with a high threshold voltage is provided in a block in whose operation a high speed is not important.
Besides, there has been proposed in the prior art that a high threshold voltage is used in a specific MOSFET for which a switching speed is not required in an operation. However, in the method that threshold voltages of MOSFETs are uniformly increased in a standby state and those are again uniformly decreased in an active operating state, increase in consumption power due to leakage current cannot be avoided in order to secure a high speed operation in the active operating state. Besides, the inventors of the present invention has discovered through a study conducted by them that there is actually present a case where a necessary operating speed is different in a different logic gate among logic gates even in the same functional block.
FIG. 11
shows a frequency distribution of delays in paths between flip-flops in a semiconductor integrated circuit operated at 100 MHz. The abscissa is used for plotting values of delays in paths and the ordinate is assigned to values of the number of paths respectively corresponding to the delay values. In order to operate at 100 MHz, a frequency distribution of delay values in the entire paths is necessary to be confined within a range less than a delay value of 10 nsec like the frequency distribution (1) shown in the figure. When an operating speed of the semiconductor integrated circuit is operated at 125 MHz, the entire paths has to fall in a frequency distribution less than a delay value of 8 nsec. To match such a condition, according to the prior art, there was two choices; one is to change process conditions and the other is to uniformly lower threshold voltages of MOSFETs constituting a circuit by changing a substrate bias source.
As a result, for example, a distribution of delay values is changed like the frequency distribution (2) of FIG.
11
. In this case, however, consumption power by a leakage current is increased and there arises a risk that a required condition posed on consumption power is not met. Besides, in the case where consumption power is required to be further reduced, according to the prior art, there was again two choices; one is to change a process condition and the other is to uniformly increase threshold voltages of MOSFETs constituting a circuit by changing a substrate bias source. As a result, a distribution of delay values is changed like the frequency distribution (3), for example. That is, an operating speed is lowered and thereby 100 MHz cannot be realized.
Consequently, a compromise must be accepted determining whether an operating speed is attached with a grater importance or lower power consumption is chosen with priority.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve the problems which the prior art has had. That is, it is an object of the present invention to provide a semiconductor integrated circuit device in which a harmony between increase in consumption power due to a leakage current and a operating speed is properly achieved, and thereby, not only is increase in consumption power by a leakage current of a MOSFET suppressed but a high speed operation is achievable in an active operation.
It is another object of the present invention to provide a storage medium on which there is stored a cell library necessary for designing a harmony between increase in consumption power due to a leakage current and a operating speed in a suitable manner.
It is a further object of the present invention to provide a designing method of a semiconductor integrated circuit device for designing a harmony between increase in consumption power due a leakage current and a operating speed in a suitable manner.
An essential point of the present invention for solving the above problems is to construct a semiconductor integrated circuit device using MOSFETs with different threshold voltages even in the same functional block in a given operating condition, for example in an active operating condition in which a high speed is required.
In particular, a first feature of a semiconductor integrated circuit device of the present invention is that the semiconductor integrate
Akita Yohei
Hiraki Mitsuru
Katoh Naoki
Yano Kazuo
Hitachi , Ltd.
Mattingly, Stanger & Malur, PC.
Tokar Michael
Tran Anh
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