Semiconductor integrated circuit device including static...

Details Semiconductor integrated circuit device including static... Semiconductor integrated circuit device including static...

2011-07-05

2011-07-05

Le, Dung A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S369000, C257S380000, C257S385000, C257SE29255

Reexamination Certificate

active

07973371

ABSTRACT:
A static random access memory (SRAM) cell includes a first well region of a first conductivity type, a second well region of the first conductivity type, formed in a location different from a location where the first well region is formed, and a third well region of a second conductivity type, which is located between the first well region and the second well region. The memory cell further includes a first tap diffused layer of the first conductivity type for supplying a potential to the first well region, a second tap diffused layer of the first conductivity type for supplying the potential to the second well region, the first and second tap diffused layers being arranged substantially on a diagonal line in the layout of the SRAM cell, and a metal interconnection connected to the first and second tap diffused layers, the metal interconnection passing on the third well region in the SRAM cell.

REFERENCES:
patent: 6653695 (2003-11-01), Oyamatsu
patent: 6677649 (2004-01-01), Osada et al.
patent: 10-178110 (1998-06-01), None
patent: 2001-28401 (2001-01-01), None
patent: 2003-23112 (2003-01-01), None
patent: 2005-347360 (2005-12-01), None
patent: 2006-339480 (2006-12-01), None
patent: 2007-19166 (2007-01-01), None

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