Semiconductor integrated circuit device implemented by bipolar a

Static information storage and retrieval – Read/write circuit – Differential sensing

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36518911, 365208, G11C 702

Patent

active

055507786

ABSTRACT:
A semiconductor static random access memory device includes an address decoder unit and a memory cell array implemented by field effect transistors, a differential amplifier circuit having a pair of bipolar transistors for increasing a potential difference indicative of a read-out data bit and a level shift circuit operative to change a voltage range of a selecting signal supplied to a field effect activation transistor coupled between the common emitter node of the bipolar transistors for activating the differential amplifier circuit, and the level shift circuit has a field effect switching transistor and a bipolar transistor coupled in series and another field effect switching transistor coupled between the collector node and the base node of the bipolar transistor so as to make the source-to-drain voltage of the field effect activation transistor large, thereby allowing the field effect activation transistor to stably operate in the saturated range.

REFERENCES:
patent: 4984207 (1991-01-01), Tateno
patent: 5229967 (1993-07-01), Nogle et al.
patent: 5452254 (1995-09-01), Takahashi

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