Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2007-06-05
2007-06-05
McLean-Mayo, Kimberly (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S154000, C711S100000, C365S185330
Reexamination Certificate
active
10857888
ABSTRACT:
In a semiconductor integrated circuit device equipped with a flash memory and an EEPROM which are nonvolatile memories, the invention provides a technique that makes it possible to restrict an EEPROM capacity to a minimum necessary amount and reduce a chip area. Data of a minimal size required for one application program and rewritten frequently is stored in the EEPROM, and the EEPROM is configured to have a capacity of about that minimal size. Data of the same size that are respectively handled by other applications and rewritten frequently are stored in the flash memory. With respect to an application that is actually used, its data stored in the flash memory is transferred to the EEPROM and used. Data transfer between the flash memory and the EEPROM is performed if necessary. Consequently, the EEPROM capacity can be reduced and chip area reduction can be achieved.
REFERENCES:
patent: 6128694 (2000-10-01), Decker et al.
patent: 6195511 (2001-02-01), Harada
patent: 7032081 (2006-04-01), Gefen et al.
patent: 2006/0190421 (2006-08-01), Suzuki et al.
Katayama Kozo
Nagasaki Nobutaka
Oodaira Nobuhiro
Shigeta Junji
Tase Takashi
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
McLean-Mayo Kimberly
Reed Smith LLP
Renesas Technology Corp.
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