Static information storage and retrieval – Systems using particular element – Flip-flop
Reexamination Certificate
2006-10-17
2006-10-17
Mai, Son (Department: 2827)
Static information storage and retrieval
Systems using particular element
Flip-flop
C365S154000, C257S903000, C257S904000
Reexamination Certificate
active
07123504
ABSTRACT:
A semiconductor integrated circuit device is configured by eight transistors including the six transistors configuring the data holding section and the two NMOS transistors configuring the reading stage. The threshold voltage of the NMOS transistors configuring the reading stage is set low and the threshold voltage of the six transistors configuring the data holding section is set higher than the threshold voltage of the NMOS transistors configuring the reading stage. The cell current flowing from the bit line to the ground terminal can be set large and the large static noise margin (SNM) can be attained.
REFERENCES:
patent: 5966319 (1999-10-01), Sato
patent: 6091626 (2000-07-01), Madan
patent: 6765817 (2004-07-01), Takemura
patent: 2005/0002215 (2005-01-01), Morishima
patent: 2000-58675 (2000-02-01), None
patent: 2003-151277 (2003-05-01), None
Kevin Zhang, et al., “The Scaling of Data Sensing Schemes for High Speed Cache Design in Sub-0.18 μm Technologies”, Tech. Dig. of VLSI Circuits Symp., Jun. 2000, pp. 226-227.
Kabushiki Kaisha Toshiba
Mai Son
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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