Semiconductor integrated circuit device having static memory cel

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257369, 257377, 257903, H01L 2976, H01L 2994

Patent

active

058805036

ABSTRACT:
A titanium silicide (4) covers surfaces of P.sup.+ -type diffusion region (7) and N.sup.+ -type diffusion region (8) to electrically connect the diffusion regions (7, 8) through the titanium silicide (4), and a surface of the titanium silicide (4) is covered with an insulation film (10). A power supply potential applied to a metal wire (2) is thereby applied to an N.sup.+ -type diffusion region (6), an N well (12) and the N.sup.+ -type diffusion region (8) through a contact hole (3) and further supplied for the P.sup.+ -type diffusion region (7) serving as a source region of PMOS transistor through the titanium silicide (4). That eliminates the need for providing any contact for supplying the diffusion regions 7 and 8 with the power supply potential to attain reduction in layout size, while preventing a latch-up. Thus, the N well-source structure of a semiconductor integrated circuit device including an SRAM with Full CMOS structure eliminates the need for providing a contact on the surfaces of the P.sup.+ -type diffusion region and the N.sup.+ -type diffusion region, to attain reduction in layout size.

REFERENCES:
patent: 4905073 (1990-02-01), Chen et al.
patent: 5521572 (1996-05-01), Ohkubo
patent: 5654572 (1997-08-01), Kawase

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