Semiconductor integrated circuit device having MOS transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S341000, C257SE21537, C257SE29256, C438S300000

Reexamination Certificate

active

10236413

ABSTRACT:
An N-channel MOS transistor of a semiconductor device having a high withstand voltage employs a drain structure with a low concentration and a large diffusion depth, which causes a problem in that a sufficiently high withstand voltage cannot be obtained due to a parasitic NPN transistor formed among the drain, the well, and the semiconductor substrate which are arranged in the stated order. According to the present invention, provided are a semiconductor device, including: a semiconductor substrate; an epitaxial layer having an electric polarity identical with that of the semiconductor substrate, which is formed on the semiconductor substrate; a buried diffusion layer having the electric polarity different from that of the semiconductor substrate, which is formed between the semiconductor substrate and the epitaxial layer; and a well region having the electric polarity identical with that of the buried diffusion layer, which is formed above the buried diffusion layer and is electrically connected therewith, in which a MOS transistor is formed in a well having a structure in which the buried diffusion layer is electrically connected with the well region, and a manufacturing method therefor.

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