Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2005-01-27
2009-08-04
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S230050, C365S230060
Reexamination Certificate
active
07570535
ABSTRACT:
A semiconductor integrated circuit device has memory macros and logic cores. The memory macro is composed of a dynamic memory including an access port and a refresh port. The semiconductor integrated circuit device also has a refresh control circuit common for a plurality of the memory macros. The refresh control circuit has a refresh address generation circuit which generates a refresh address for a memory macro having the largest capacity, supplies the refresh address to the memory macro, and supplies given top bits of the refresh address as a refresh address to another memory macro having a smaller capacity.
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McGinn IP Law Group PLLC
NEC Electronics Corporation
Nguyen Tuan T.
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