Semiconductor integrated circuit device having low-power consump

Details Semiconductor integrated circuit device having low-power consump Semiconductor integrated circuit device having low-power consump

1994-08-25

1995-11-21

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Including signal comparison

365233, 365222, 36518908, 365191, G11C 700

Patent

active

054693861

ABSTRACT:
A semiconductor synchronous dynamic random access memory device is responsive to a clock signal and a clock enable signal for selectively carrying out internal sequences such as a read-out sequence, a write-in sequence and a self-refreshing sequence, and a signal input unit assigned to the clock enable signal has a complementary logic gate type signal input circuit enabled in a self-refreshing sequence for receiving the clock enable signal and a current-mirror type signal input circuit enabled in other sequences for receiving the clock enable signal so that the current consumption of the signal input unit is decreased during the self-refreshing sequence.

REFERENCES:
patent: 4989183 (1991-01-01), Kumanoya et al.
patent: 5278797 (1994-01-01), Jean et al.
patent: 5329490 (1994-07-01), Murotani
patent: 5335201 (1994-08-01), Walther et al.
Patent Abstracts of Japan; vol. 10, No. 274 (P498) Sep. 18, 1986 & JP-A-61 096 589.
Patent Abstracts of Japan; vol. 12, No. 199 (P-714) 9 Jun. 1988 & JP-A-63 002 193.

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