Semiconductor integrated circuit device having excellent dual po

Details Semiconductor integrated circuit device having excellent dual po Semiconductor integrated circuit device having excellent dual po

1995-07-21

1997-03-11

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257355, H01L 2362

Patent

active

056104260

ABSTRACT:
A protective circuit that can maintain effectiveness when excess voltages of both polarities are applied is placed between the input terminal of an internal CMOS inverter and an input pad. The protective circuit includes a protective resistor, a P-channel MOSFET and an N-channel MOSFET. The N-channel MOSFET is placed between a connecting line and a ground terminal with the gate terminal of the MOSFET connected to the connecting line. The P-channel MOSFET is placed between the connecting line and the ground terminal with the gate terminal of the MOSFET connected to the connecting line. The P-channel MOSFET releases excess negative voltage from the outside using ON-state current and the N-channel MOSFET releases excess positive voltage from the outside using ON-state current.

REFERENCES:
patent: 4893159 (1990-01-01), Suzuki et al.
patent: 5389811 (1995-02-01), Poucher et al.
patent: 5438213 (1995-08-01), Tailliet
patent: 5449940 (1995-09-01), Hirata
patent: 5500542 (1996-03-01), Iida et al.

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