Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent
1991-12-13
1993-12-28
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
36518907, G11C 700
Patent
active
052745929
ABSTRACT:
A semiconductor integrated circuit device having a high-efficiency transfer gate and which is applicable to a DRAM which has voltage-raised word lines configured from a data retention node, a data line that is precharged to a required level, a MOS transistor with the source and the drain each connected to a data line and a data retention node, a sense amplifier that amplifies the data that has been transferred to the data line via this MOS transistor a step-up circuit that applies a voltage that is higher than the drain voltage when compared with an absolute value, to the gate of the MOS transistor, and a step-down circuit for reducing the absolute value of a gate voltage of the MOS transistor at the timing of activation of the sense amplifier.
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Koinuma Hiroyuki
Nagaba Katsushi
Sueoka Atsushi
Kabushiki Kaisha Toshiba
LaRoche Eugene R.
Zarahian A.
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