Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1994-11-01
1996-05-21
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Bad bit
3652257, 365177, G11C 700
Patent
active
055196586
ABSTRACT:
Disclosed are a semiconductor integrated circuit device and methods for production thereof. An embodiment of the invention is a semiconductor chip that comprises fuses constituting part of redundancy circuits formed therein, the fuses being made of the same ingredients CCB bump substrate metal. The fuses are patterned simultaneously during the patterning of the CCB bump substrate metal. This involves forming the fuses using at least part of the ingredients of an electrode conductor pattern in the chip. The cutting regions of the fuses are made of only one of the metal layers constituting the substrate. The principal plane of the semiconductor chip has a fuse protective film formed over at least the cutting regions of the fuses for protection of the latter. In operation, a switch MOSFET under switching control of a redundancy signal is used to select one of two transmission paths, one carrying an address signal or a decode signal, the other carrying a reference voltage. This allows a faulty circuit to be replaced with the corresponding redundancy circuit.
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Akimoto Kazuhiro
Hiramoto Toshiro
Hirokawa Jun
Ishida Hisashi
Odaka Masanori
Hitachi , Ltd.
Le Vu A.
Nelms David C.
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