Semiconductor integrated circuit device and method of testing th

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

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714733, G01R 3128

Patent

active

060556552

ABSTRACT:
Functional circuits such as a processor, an SRAM, a DRAM and a flash-EEPROM are mounted on a semiconductor chip. Of these functional circuits, for example, the flash-EEPROM which fluctuates a potential of the semiconductor chip is separated from the other circuits by means of a separating region provided in the semiconductor chip. In addition, the separating region is put in contact with the entire side faces of the semiconductor chip.

REFERENCES:
patent: 4467400 (1984-08-01), Stopper
patent: 4742385 (1988-05-01), Kohmoto
patent: 4910735 (1990-03-01), Yamashita
patent: 5438542 (1995-08-01), Atsumi et al.
patent: 5491358 (1996-02-01), Miyata
patent: 5525912 (1996-06-01), Momohara
patent: 5608335 (1997-03-01), Tailliet
patent: 5663901 (1997-09-01), Wallace et al.
patent: 5721445 (1998-02-01), Singh et al.
patent: 5802270 (1998-09-01), Ko et al.
patent: 5818249 (1998-10-01), Momohara

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