Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
2002-06-14
2004-11-02
Huff, Mark F. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S005000, C430S313000, C430S322000, C430S394000, C430S396000
Reexamination Certificate
active
06811954
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a semiconductor integrated circuit device of a semiconductor device particularly including a logic integrated circuit or logic LSI or the like, a method of manufacturing the same and a method of manufacturing a mask formed with a pattern used therefor.
BACKGROUND ART
High performance/sophisticated features of a semiconductor integrated circuit are achieved by miniaturized formation/highly integrated formation of a circuit pattern. For example, in the case of logic LSI, speeding-up has been promoted by reducing a gate length of a transistor and sophisticated features has been achieved by increasing a circuit density per unit area. In accordance therewith, a pitch of arranging wirings (interconnected) for connecting logic gates to each other has rapidly been miniaturized. With regard to progress in the wiring pitch, although currently, a pitch of 0.8 through 0.4 &mgr;m is considered to be achieved by using a KrF excimer laser exposure apparatus, further, a pitch of about 0.3 &mgr;m is considered to be achieved by using an ArF excimer laser exposure apparatus, it is anticipated that a pitch smaller than 0.3 &mgr;m is difficult to realize by a conventional reduction projection exposure method using deep ultra violet light. Hence, as a method of realizing a further smaller pattern, an electron beam writing method (or EB lithography), an X-ray exposure method (or proximity X-ray lithography) or the like has been investigated. Meanwhile, as a method of promoting resolution performance of an optical system without changing the optical system, there is known a phase-shifting mask. According to the method, phase of light transmitting through a specific light transmitting portion (also referred to as opening portion) on a mask is controlled (normally, reversed by 180 degrees), by which resolution of an optical system is significantly promoted in comparison with a case of using a conventional mask.
According to the phase shifting method, there is needed phase arrangement for determining at which portion of a circuit pattern the phase is reversed at a design stage. However, according to an actual circuit pattern, some patterns in which phase arrangement is essentially difficult may be produced. For example, a case in which U-shape patterns or three light transmitting patterns (that is, opening patterns) are arranged at distances the most proximate to each other, corresponds thereto and this is referred to as phase conflict. Since the problem is difficult to resolve, the phase-shifting mask has been applied and used to restrict to a simple pattern of a memory cell of the memory LSI or the like.
A method of avoiding the phase conflict even in the case of applying the phase-shifting mask to a complicated pattern has been reported by Oi et al. According thereto, a layout avoiding the phase conflict is calculated by carrying out compaction after phase arrangement at a symbolic level.
Other method of resolving the phase conflict is based on a concept of carrying out multiple exposure of a plurality of masks including the phase-shifting mask on the same photoresist layer. The concept has been patented by the inventors in Japanese Patent No. 2650962 and No. 2638561. Further, application of the concept to various circuit patterns has been reported. For example, an application for forming a gate pattern of a logic LSI has been filed for patent by Jinbo or Komatsu et al. (Japanese Patent Laid-Open No. Hei 5(1993)-204131, Japanese Patent Laid-Open No. Hei 6(1994)-67403). Further, a method of applying the concept to a wiring has been filed by B. J. Lin et al. (Japanese Patent Laid-Open No. Hei 8 (1996)-227140). Further, an arbitrary pattern generation algorithm by a phase-shifting mask using a phase retrieval method has been proposed by Y. C. Pati et al. (SPIE: Optical/Laser Microlithography VII, SPIE Vol. 2197 (1994) pp.314-327).
However, the above-described electron beam writing method or X-ray exposure method poses the following problems. First, according to the electron beam writing method, enormous time is taken for successively writing individual patterns. Hence, there is investigated a cell projection method capable of transcribing all pattern of a certain degree of a scale (for example, about 5 &mgr;m square), however, a kind of a pattern which can be set is limited and therefore, the method is not effective in a random wiring pattern of a logic LSI. Further, although there has been investigated an SCALPEL method capable of carrying out scanning exposure of a large area mask, the throughput is greatly reduced compared with that of the current exposure method.
Further, according to the X-ray exposure method, there poses a problem that it is difficult to realize a mask having sufficient accuracy.
Meanwhile, there poses the following problems in various methods which have been proposed conventionally for applying the phase-shifting mask method to an actual complicated circuit pattern.
For example, according to the method of carrying out compaction after phase arrangement at a symbolic level, a circuit dimension of the portion of producing the phase conflict is alleviated and therefore, the method is essentially counter to miniaturization of circuit.
Meanwhile, a logic LSI in recent times exceeds a manually designable scale and almost all of logic LSI's are designed by using an automatic place and route method. Therefore, it is necessary to generate a phase-shifting mask with respect to automatically generated enormous pattern data and it is nonrealistic to generate the phase-shifting mask manually by trial and error.
However, in the method of dealing with a complicated pattern by using multiple exposure of a plurality of masks, for example, according to Japanese Patent Laid-Open No. Hei 5(1993)-204131 or Japanese Paten Laid-Open No. Hei 8 (1996)-227140, a rule for decomposing an original design pattern into a plurality of masks is not generalized and therefore, there poses a problem that it is difficult to deal with actual enormous LSI data.
Further, methods disclosed in Japanese Patent Laid-Open No. Hei 5(1993)-204131 or Japanese Patent Laid-Open No. Hei 6(1994)-67403, are for miniaturizing a gate of a transistor and there poses a problem that it is difficult to reduce a wiring pitch by applying the methods to a wiring pattern.
Meanwhile, according to the method of decomposing a pattern in vertical and horizontal directions disclosed in Japanese Paten Laid-Open No. Hei 8(1996)-227140, it is difficult to correspond to an arbitrary pattern in a random wiring of a logic LSI. For example, when a circuit pattern
5
shown in
FIG. 29
is decomposed in vertical and horizontal directions, two sheets of masks V and H are formed as shown by FIGS.
30
(
a
) and
30
(
b
), however, in this case, for example, phase conflict between two light transmitting portions (opening portions) X
1
and X
2
in the mask H is not resolved. In
FIG. 30
, numeral
1
designates a light blocking portion and numerals
2
,
3
and
4
designate light transmitting portions (opening portions). According to the above-described publicly-known example, there is suggested a way of thinking that the light transmitting (opening) patterns X
1
and X
2
on the mask are further distributed to two sheets of masks, however, in this case, X
1
and X
2
constitute incoherent summation and therefore, it is difficult to clearly separate these. Further, since there is not given a general guiding principle therefor, it is difficult to apply the way to a large scale LSI pattern including an enormous random patterns for which manual operation is substantially impossible as described above.
Further, since a phase arranging method using the phase retrieval method requires an enormous amount of calculation and therefore, it is difficult to carry out the processing on the large scale data in a practical time period, further, the generated mask pattern is complicated, there poses a problem that a limit or the like in actually manufacturing a mask is not necessarily taken into consideration.
Meanwhi
Barreca Nicole
Huff Mark F.
Miles & Stockbridge P.C.
Renesas Technology Corp.
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