Semiconductor integrated circuit device and method of...

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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Details

C365S174000, C365S072000, C365S051000, C257S306000

Reexamination Certificate

active

07920400

ABSTRACT:
A semiconductor integrated circuit device having a 6F2layout is provided. The semiconductor integrated circuit device includes a substrate; a plurality of unit active regions disposed in the substrate and extending in a first direction; first and second access transistors including first and second gate lines disposed on the substrate and extending across the unit active regions in a second direction forming an acute angle with the first direction; a first junction area disposed in the substrate between the first and second gate lines and second junction areas disposed on sides of the first and second gate lines where the first junction area is not disposed; a plurality of bitlines disposed on the substrate and extending in a third direction forming an acute angle with the first direction; and a plurality of bitline contacts directly connecting the first junction area and the bitlines.

REFERENCES:
patent: 5691551 (1997-11-01), Eimori
patent: 6156601 (2000-12-01), Lee et al.
patent: 2005/0012125 (2005-01-01), Summerfelt et al.
patent: 2007/0296045 (2007-12-01), Tanaka
patent: 2010/0148236 (2010-06-01), Kadoya
patent: 2001-0014953 (2001-02-01), None
patent: 2001-0020983 (2001-03-01), None
patent: 2002-0061871 (2002-07-01), None
patent: 2002-0066586 (2002-08-01), None
patent: 2006-0073110 (2006-06-01), None
English language abstract of Korean Publication No. 2001-0014953.
English language abstract of Korean Publication No. 2002-0061871.
English language abstract of Korean Publication No. 2002-0066586.

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