Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2005-08-30
2005-08-30
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S770000, C438S773000, C438S687000, C438S686000, C438S685000, C438S650000
Reexamination Certificate
active
06936550
ABSTRACT:
A manufacturing method for a semiconductor integrated circuit device comprises forming, over a gate insulating film which has been formed over the main surface of a single crystal silicon substrate to have an effective film thickness less than 5 nm in terms of SiO2, a W film as a gate electrode material, and heat treating the silicon substrate in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the W film, whereby defects of the gate insulating film right under the W film are repaired. In this way, in a MISFET having a metal gate electrode formed over a ultra-thin gate insulating film having an effective film thickness less than 5 nm in terms of SiO2, defects of the gate insulating film can be repaired without oxidizing the metal gate electrode.
REFERENCES:
patent: 4505028 (1985-03-01), Kobayashi et al.
patent: 6162741 (2000-12-01), Akasaka et al.
patent: 6214683 (2001-04-01), Xiang et al.
patent: 6228752 (2001-05-01), Miyano
patent: 6239044 (2001-05-01), Kashiwagi et al.
patent: 6287903 (2001-09-01), Okuno et al.
patent: 6306698 (2001-10-01), Wieczovek et al.
patent: 6323115 (2001-11-01), Tanabe et al.
patent: 6362086 (2002-03-01), Weimer et al.
patent: 6482740 (2002-11-01), Soininen et al.
patent: 6593229 (2003-07-01), Yamamoto et al.
patent: 2001/0042344 (2001-11-01), Ohmi et al.
patent: 2001/0051406 (2001-12-01), Weimer et al.
patent: 2002/0004263 (2002-01-01), Tanabe et al.
patent: 59-132136 (1984-07-01), None
patent: 7-94716 (1995-04-01), None
patent: 9-298170 (1997-11-01), None
patent: 10-233505 (1998-09-01), None
patent: 11-330468 (1999-11-01), None
Tanabe Yoshikazu
Yamamoto Naoki
Antonelli Terry Stout & Kraus LLP
Berry Renee R.
Hitachi , Ltd.
Nelms David
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