Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2000-05-25
2004-05-18
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S167000, C438S197000, C438S592000, C438S635000
Reexamination Certificate
active
06737341
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a manufacturing technique of a semiconductor integrated circuit device, particularly to a technique effective when adapted to the manufacture of a semiconductor integrated circuit device having a MISFET equipped with a metal gate electrode.
Japanese Patent Application Laid-Open No. SHO 59(1984)-132136 (Kobayashi, et al., corresponding to U.S. Pat. No. 4,505,028) discloses a technique wherein a gate electrode of a metal structure is formed from a W film (or Mo film) on a Si (silicon) substrate and then, the resulting electrode is oxidized in a mixed atmosphere of water vapor and hydrogen, whereby only Si is selectively oxidized without oxidizing the W (Mo) film. This technique makes use of the fact that a water vapor/hydrogen partial pressure ratio at which the redox reaction is in equilibrium is different between W (Mo) and Si. Selective oxidation of Si is actualized by setting this partial pressure ratio within a range permitting the reduction of W (Mo) but oxidation of Si.
Japanese Patent Application Laid-Open No. HEI 7(1995)-94716 (Muraoka, et al.) discloses a technique wherein a gate electrode of a polymetal structure including a metal nitride layer such as TiN and a metal layer such as W is formed over an Si substrate via a gate oxidized film and then, the resulting substrate is oxidized in a reducing gas (hydrogen)+oxidizing gas (vapor vapor) atmosphere diluted with nitrogen. According to it, only Si can be selectively oxidized without oxidation of the metal layer and at the same time, oxidation of the metal nitride layer can be prevented, because denitrification from the metal nitride layer can be prevented by diluting the water vapor+hydrogen gas mixture with nitrogen.
Japanese Patent Application Laid-Open No. SHO 60(1985)-160667 (Agatsuma) discloses a technique wherein a thin film made of a refractory metal such as W or Mo is formed over a silicon substrate and then, the resulting substrate is heat treated in a non-oxidizing atmosphere to diffuse oxygen occluded in the thin film to the surface of the substrate, whereby an extremely thin silicon oxide film is formed on the interface between them.
SUMMARY OF THE INVENTION
(1) A CMOS-LSI having a circuit formed from a MISFET having a gate length as minute as 0.18 &mgr;m or less is required to have a gate electrode formed using a metal-containing low-resistance conductive material in order to lower gate delay even upon operation at low voltage, thereby maintaining high-speed operation.
A composite conductive film (which will hereinafter be called “polymetal”) having a refractory metal film stacked over a polycrystalline silicon film ha s been regarded promising as such a low-resistance gate electrode material. The polymetal can be used not only as a gate electrode material but also as an interconnection material, because it has a sheet resistance as low as about 2 &OHgr;/□. As the refractory metal, W (tungsten), Mo (molybdenum), Ti (titanium) or the like which exhibits good low resistance even in a low temperature process of 800° C. or less and at the same time, has high electromigration resistance can be employed. Direct stacking of such a refractory metal film on a polycrystalline silicon film, however, causes inconveniences such as lowering in their adhesive forces a nd formation of a high-resistance silicide layer on the interface between them upon high-temperature heat treatment process. Accordingly, an industrially used polymetal gate is constituted of three layers having, between a polycrystalline silicon film and a refractory metal film, a conductive barrier film made of a metal nitride film such as TiN (titanium nitride) or WN (tungsten nitride).
(2) With a view to setting the threshold voltage (Vth) of a CMOS-LSI having a circuit formed from a MISFET having a gate length as minute as 0.18 &mgr;m or less at a low level for satisfying a tendency to low-voltage operation, a so-called dual gate structure wherein a polycrystalline silicon film partially constituting a polymetal gate has a n-type conductivity for the n-channel type MISFET and p-type conductivity for the p-channel type MISFET tends to be adopted. In this structure, the gate electrode of the n-channel type MISFET has a refractory metal film stacked on the n-type polycrystalline silicon film doped with n type impurities such as P (phosphorus), while that of the p-channel type MISFET has a refractory metal film stacked on the p-type polycrystalline film doped with p type impurities such as B (boron).
The CMOS-LSI as described above in (1) is however accompanied with the problem that when the gate length of the MISFET becomes not greater than 0.18 &mgr;m, a two-layer structure having a refractory metal film stacked on a polycrystalline silicon film or a three-layer structure having a conductive barrier film formed therebetween inevitably has a markedly increased aspect ratio, which makes processing of the gate electrode difficult.
The CMOS-LSI as described above in (2) is on the other hand accompanied with the problem that B (boron) in the p-type polycrystalline silicon film partially constituting the gate electrode of the p-channel type MISFET is diffused through the gate oxide film to the side of the substrate and changes the flat band voltage (Vfb) of the p-channel type MISFET, thereby causing a fluctuation in the threshold voltage (Vth).
A so-called metal gate electrode having a refractory metal film such as W or Mo directly formed on a gate oxide film without disposing therebetween an intermediate layer such as polycrystalline silicon film is therefore under development for avoiding the above-described problems.
In order to actualize high velocity and high performance of a MISFET, it is necessary to reduce the film thickness of a gate oxide film in proportion to the miniaturization of the MISFET. For example, a MISFET having a gate length of about 0.25 &mgr;m to 0.2 &mgr;m needs a gate oxide film having a film thickness thinner than 5 nm.
When the film thickness of the gate oxide film is reduced to 5 nm or less, however, lowering in the withstand voltage due to generation of a direct tunnel current or hot carriers induced from a stress becomes apparent. In addition, direct formation of a refractory metal film such as W or Mo over such a thin gate oxide film causes defects in the gate oxide film in the vicinity of the interface between them, thereby reducing the withstand voltage.
Since the defects of the gate oxide film mainly result from the oxygen deficiency of an Si—O bond, it is possible to repair the defects by heat treating the substrate in an oxidizing atmosphere, thereby supplying the oxygen-deficient portion with oxygen. The heat treatment of the substrate in an oxidizing atmosphere, however, causes simultaneous oxidation of a refractory metal film which is a gate electrode material deposited over a gate oxide film and inevitably increases the resistance of a gate insulating film.
In order to prevent a reduction in the withstand voltage due to a thinning tendency of a gate oxide film, it is considered as one countermeasure to use, as a gate insulating film material, an insulating-metal oxide such as tantalum oxide having a dielectric constant larger than silicon oxide, thereby increasing its effective thickness.
Such an insulating metal oxide is a crystalline material so that a step of heat treating it in an oxygen atmosphere after film formation to supply the film with oxygen is indispensable for obtaining its original insulation properties. Heat treatment of the substrate in an oxidizing atmosphere, however, increases the resistance of the gate insulating film, because a refractory metal film, which is a gate electrode material deposited over the gate insulating film, is oxidized at the same time.
An object of the present invention is therefore to provide a technique for improving the reliability and production yield of a MISFET having a metal gate electrode formed over an ultra-thin gate insulating film.
Another object of the present invention is to provide a technique
Tanabe Yoshikazu
Yamamoto Naoki
Antonelli Terry Stout & Kraus LLP
Everhart Caridad
Luu Chuong
Renesas Technology Corporation
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