Semiconductor integrated circuit device

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Reexamination Certificate

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Details

C326S093000, C326S095000

Reexamination Certificate

active

08067962

ABSTRACT:
A semiconductor integrated circuit device has a combinational logic circuit including one or plural logic cells connected in series. At least one of the logic cells includes a standard cell which includes a MIS transistor, an input terminal to which an output signal from a previous stage is inputted as an input signal, and an output terminal. A first conductivity-type first MIS transistor which is provided between the output terminal of the standard cell and a first power supply voltage, the first MIS transistor including a control terminal to which a circuit control signal is inputted, and the first MIS transistor supplying the first power supply voltage to the output terminal of the standard cell based on the circuit control signal in order to bring the standard cell into an operation-stopped state. A second conductivity-type second MIS transistor cuts off a leakage current of the MIS transistor in the standard cell.

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patent: 2005-210009 (2005-08-01), None
G. Uvieghara, et al., A Highly-Integrated 3G CDMA2000 1X Cellular Baseband Chip With GSM/AMPS/GPS/Bluetooth/Multimedia Capabilities and ZIF RF Support, IEEE International Solid-State Circuits Conference, paper 23.3, Slide Supplements, 2004, 19 pages.
G. Uvieghara, et al., A Highly-Integrated 3G CDMA2000 1X Cellular Baseband Chip With GSM/AMPS/GPS/Bluetooth/Multimedia Capabilities and ZIF RF Support, IEEE International Solid-State Circuits Conference, Session 23, Feb. 18, 2004, 5 pages.
Office Action issued Mar. 8, 2011, in Japanese Patent Application No. 2005-238747 (with English-language Translation).

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