Semiconductor integrated circuit device

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S156000, C365S226000

Reexamination Certificate

active

08072799

ABSTRACT:
The invention provides a semiconductor integrated circuit device provided with an SRAM that satisfies the requirements for both the SNM and the write margin with a low supply voltage. The semiconductor integrated circuit device include: multiple static memory cells provided in correspondence with multiple word lines and multiple complimentary bit lines; multiple memory cell power supply lines that each supply an operational voltage to each of the multiple memory cells connected to the multiple complimentary bit lines each; multiple power supply circuits comprised of resistive units that each supply a power supply voltage to the memory cell power supply lines each; and a pre-charge circuit that supplies a pre-charge voltage corresponding to the power supply voltage to the complimentary bit lines, wherein the memory cell power supply lines are made to have coupling capacitances to thereby transmit a write signal on corresponding complimentary bit lines.

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Office Action from the Chinese Patent Office dated Feb. 6, 2009, in Chinese and English.
Office Action from Japanese Patent Office in the corresponding Japanese Application No. 2004-267645, mailed Mar. 17, 2010, in Japanese.

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