Semiconductor integrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S288000, C257SE29245

Reexamination Certificate

active

07808056

ABSTRACT:
A semiconductor integrated circuit device includes a first field-effect transistor and a second field-effect transistor, each of the first field-effect transistor and the second field-effect transistor having a gate electrode formed as a ring shape, a drain diffusion layer formed inside the gate electrode and a source diffusion layer formed outside the gate electrode and a substrate potential diffusion layer or a well potential diffusion layer disposed to contact each of the source diffusion layers of the first and the second field-effect transistors of the same conductivity type, the substrate potential diffusion layer or the well potential diffusion layer being formed with a semiconductor of a different conductivity type from the source diffusion layer. Different signals are input to each of the gate electrodes, the substrate potential diffusion layer or the well potential diffusion layer are formed between the source diffusion layer of the first field-effect transistor and the source diffusion layer of the second field-effect transistor.

REFERENCES:
patent: 6097066 (2000-08-01), Lee et al.
patent: 6140687 (2000-10-01), Shimomura et al.
patent: 6922094 (2005-07-01), Arima et al.
patent: 7016214 (2006-03-01), Kawamata et al.
patent: 7067368 (2006-06-01), Fang et al.
patent: 7250661 (2007-07-01), Takahashi et al.
patent: 62-262462 (1987-11-01), None
patent: 9-330986 (1997-12-01), None
patent: 2003-273709 (2003-09-01), None
patent: 2005-159131 (2005-06-01), None
T. Calin et al., Topology-Related Upset Mechanisms in Design Hardened Storage Cells, RADECS98, Fourth European Conference on Radiation and Its Effect on Components and System, 1998, pp. 484-488.
D.C. Mayer et al., “Reliability Enhancement in High-Performance MOSFETs by Annular Transistor Design,” IEEE Transactions on Nuclear Science, vol. 51:6, Dec. 2004, pp. 3615-3620.
K. Osada, “SRAM Immunity to Cosmic-Ray-Induced Multierrors Based on Analysis of an Induced Parasitic Bipolar Effect,” IEEE Journal of Solid-State Circuits, vol. 39:5, May 2004, pp. 827-833.
E. Takeda et al., “A Cross Section of a-Particle-Induced Soft-Error Phenomena in VLSI's,” IEEE Transactions on Electron Devices, vol. 36:11, Nov. 1989, pp. 2567-2575.
K Yuzuriha et al., A Large Cell-Ratio and Low Node Leak 16M-bit SRAM Cell Using Ring-Gate Transistors, 1991 International Electron Devices Meeting, pp. 485-488.

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