Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2007-02-21
2008-10-21
Pham, Ly D (Department: 2827)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S072000, C365S164000, C365S191000
Reexamination Certificate
active
07440350
ABSTRACT:
A DRAM whose operation is sped up and power consumption is reduced is provided. A pair of precharge MOSFETs for supplying a precharge voltage to a pair of input/output nodes of a CMOS sense amplifier is provided; the pair of input/output nodes are connected to a complementary bit-line pair via a selection switch MOSFET; a first equalize MOSFET is provided between the complementary bit-line pair for equalizing them; a memory cell is provided between one of the complementary bit-line pair and a word line intersecting with it; gate insulators of the selection switch MOSFETs and first equalize MOSFET are formed by first film thickness; a gate insulator of the precharge MOSFET is formed by second film thickness thinner than the first film thickness; a precharge signal corresponding to a power supply voltage is supplied to the precharge MOSFET; and an equalize signal and a selection signal corresponding to a boost voltage are supplied to the first equalize MOSFET and the selection switch MOSFET, respectively.
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Hasegawa Masatoshi
Hokari Tomofumi
Obara Tadahiro
Tajima Ken'ichi
Tanaka Yousuke
Hitachi , Ltd.
Hitachi ULSI Systems Co. Ltd.
Miles & Stockbridge P.C.
Pham Ly D
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