Semiconductor integrated circuit device

Static information storage and retrieval – Read/write circuit

Reexamination Certificate

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C365S230030, C365S156000

Reexamination Certificate

active

07345927

ABSTRACT:
A semiconductor integrated circuit device includes a plurality of sense amplifier line pairs, a plurality of sense amplifier latch circuits respectively connected to the sense amplifier line pairs, and a sense amplifier driver circuit which supplies a sense amplifier activation signal to the sense amplifier latch circuits. The sense amplifier driver circuit is provided for each of the plurality of sense amplifier latch circuits and supplies the sense amplifier activation signal to each of the plurality of sense amplifier latch circuits.

REFERENCES:
patent: 5724292 (1998-03-01), Wada
patent: 6885593 (2005-04-01), Mizuno et al.
patent: 6898099 (2005-05-01), Srinivasan et al.
patent: 6999364 (2006-02-01), Hosokawa et al.
patent: 2001/0002886 (2001-06-01), Ooishi
patent: 2004/0190350 (2004-09-01), Wada
patent: 2-3146 (1990-01-01), None
patent: 2-226581 (1990-09-01), None
patent: 4-252493 (1992-09-01), None
patent: 10-162577 (1998-06-01), None
Harold Pilo, et al. “A 5.6ns Random Cycle 144Mb DRAM with 1.4Gb/s/pin and DDR3-SRAM Interface”, 2003 IEEE International Solid-State Circuits Conference, p. 308.

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