Semiconductor integrated circuit device

Details Semiconductor integrated circuit device Semiconductor integrated circuit device

2005-04-12

2005-04-12

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synthesizer

C327S099000, C327S408000, C327S158000

Reexamination Certificate

active

06879188

ABSTRACT:
A semiconductor integrated circuit device employing two clock signal generating circuits which output clock signals for distribution to an internal circuit of the device, the first and second clock signal generating circuits having different clock-settling times and the selection thereof is effected from outside of the device. A first one of the clock signal generating circuits uses, for example, a phase-locked loop circuit which has a large clock-settling time, and the second clock signal generating circuit is implemented, for example, using a delay-locked loop circuit whose clock-settling time is small, for example, 2-3 periods. Due to the selective actuation of the second clock signal generating circuit, which has a small clock-settling time, the generating of clock signals for the internal circuits can also be halted when the internal circuits of the device are halted thereby to further lower power consumption without compromising clock oscillator responsiveness.

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“Hitachi SuperH RISC Engine SH7750 Hardware Manual”, pp. 10-15 to 10-15, published in Apr. 1998.
Lee et al. “A 250MHz Low Jitter Adaptive Bandwidth PLL”, 1999 IEEE Int'l Solid-State Circuits Conference, Digest of Technical Papers, pp. 346-347, 1999.

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