Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
1999-04-01
2001-05-29
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S039000, C326S040000, C257S206000, C257S207000
Reexamination Certificate
active
06239614
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
This invention relates to a semiconductor integrated circuit device, and particularly to a semiconductor integrated circuit device including MOS transistors, which is capable of operating at a low power supply voltage when taken active and reducing power consumption resultant from a leakage current during standby.
Description of the Related Art
As high integration of an LSI or an increase in performance thereof progresses, how to reduce the power consumption has recently been recognized as an important problem. It can be said that in a CMOS type LSI in particular, a reduction in the power supply voltage is a method most effective for low power consumption because the power consumption is directly proportional to the square of the power supply voltage. However, the reduction in the power supply voltage will cause a reduction in the operating speed of a MOS transistor. Avoiding this needs to reduce a threshold voltage when it is active. However, the reduction in the threshold voltage leads to an increase in leakage current of the MOS transistor during standby. An MTCMOS (Multithreshold-Voltage CMOS) has been proposed as an LSI for solving such a problem. The MTCMOS has been introduced in the paper: ┌1-V Power Supply High-Speed Digital Circuit Technology with Multithreshold-Voltage CMOS (IEEE JOURNAL OF SOLID-STATE CIRCUIT. VOL. 30. NO. 8, AUGUST 1995 ) or the like, for example.
This type of MTCMOS generally has at least one logic circuit electrically connected between a virtual power supply line and a virtual power supply line and comprised of MOS transistors each having a low threshold voltage and standby power control MOS transistors each having a high threshold voltage, which are electrically connected between a power supply line and the virtual power supply line and between a ground line and a virtual ground line to reduce the leakage current of each MOS transistor during standby. Further, MTCMOS has a latch circuit directly connected between the-power supply line and the ground line. Since the latch circuit is provided with MOS transistors each having a high threshold voltage, which are directly connected to the power supply line and the ground line, it is possible to prevent the destruction of data stored in the logic circuit even if the virtual power supply line and the virtual ground line are respectively brought to a floating state during standby.
However, the conventional MTCMOS adopts a standard cell system in which layout design is performed in units of a latch circuit such as a flip-flop circuit comprised of an inverter circuit, a master circuit and a slave circuit, and a logic circuit. The layout design based on such a standard cell system has a problem in that since it is performed in respective circuit units, the period required to manufacture the MTCMOS becomes long.
In the conventional MTCMOS on the other hand, the threshold voltage of the standby power control MOS transistor used to reduce the leakage current flowing during standby is set sufficiently high. Thus, when it is taken active, a sufficient current is not supplied to the virtual power supply line or the virtual ground line thereby to make the voltage value unstable. As a result, the conventional MTCMOS has inconvenience that a high-speed logical operation cannot be implemented.
SUMMARY OF THE INVENTION
With the foregoing in view, it is therefore an object of the present invention to implement the layout of a semiconductor integrated circuit device by a gate array system, thereby shortening a manufacturing period thereof as compared with the conventional standard cell system. It is another object of the present invention to provide a semiconductor integrated circuit device capable of restraining variations in the values of voltages applied to a virtual power supply line and a virtual ground line and reducing a delay time when switching is done between logic circuits provided within an MTCMOS.
According to one aspect of this invention, for achieving the above objects, there is provided a semiconductor integrated circuit device comprises first unit cells each including PMOS transistors and NMOS transistors, each transistor having a first threshold voltage, second unit cells each including PMOS transistors and NMOS transistors, each transistor having a second threshold voltage, a unit cell array comprised of the first and second unit cells laid in array form, a power switch disposed around the unit cell array and comprised of the PMOS transistors and NMOS transistors each having the second threshold voltage, and input/output circuits disposed around the unit cell array. Another invention comprises a first power supply line supplied with a first power supply potential level, a second power supply line supplied with a second power supply potential level, a first virtual power supply line, a second virtual power supply line, a latch circuit electrically connected between the first and second power supply lines, at least one logic circuit electrically connected between the first and second virtual power supply lines, a first capacitor electrically connected between the first power supply line and the second virtual power supply line, and a second capacitor electrically connected between the second power supply line and the first virtual power supply line.
REFERENCES:
patent: 5552618 (1996-09-01), Taniguchi et al.
patent: 5932900 (1999-08-01), Lin et al.
patent: 5945702 (1999-08-01), Nakanishi
patent: 5994726 (1999-11-01), Ikeda et al.
patent: 6040609 (2000-03-01), Frisina
patent: 6066866 (2000-05-01), Omori
Shin'ichiro Mutoh et al., “1-V Power Supply High-Speed Digital Circuit Technology with Multithreshold-Voltage CMOS” IEEE Journal of Solid-State Circuits, vol. 30, No. 8, Aug. 1995, pp. 846-854.
Jones Volentine, LLC
OKI Electric Industry Co., Ltd.
Tan Vibol
Tokar Michael
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