Semiconductor integrated circuit device

Details Semiconductor integrated circuit device Semiconductor integrated circuit device

1999-08-26

2001-03-27

Flynn, Nathan (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S776000

Reexamination Certificate

active

06207986

ABSTRACT:

BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to a semiconductor integrated circuit device whose patterns are formed using a phase-shifting mask. More particularly, the invention relates to a semiconductor integrated circuit device having electrode wires arranged to achieve a high degree of integration.
(2) Description of the Prior Art
One way of forming integrated circuit (IC) patterns using a phase-shifting mask involves locating phase shifters in apertures of a photomask to ensure that transmitted exposure light beams are 180 degrees out of phase between adjacent patterns whereby fine line patterns of high resolution are formed (known as the Levenson arrangement). The theory of pattern formation based on the Levenson arrangement is described in IEEE Transactions on Electron Devices, ED-29, pp. 1828-1836, 1982. This technique has made possible the formation of patterns with their fine lines made narrower than the wavelength of exposure light.
Next, a conventional example using the technique above is described in detail below with reference to
FIGS. 3 and 4
.
FIG. 3
is a plan view of wire electrodes in a conventional semiconductor integrated circuit device. In
FIG. 3
, wire electrodes
202
,
203
,
204
and
208
are part of first-layer IC elements including MOSFETs formed on a semiconductor substrate. The wire electrodes
204
and
208
are formed using a zero-phase pattern (&phgr;=0) while the wire electrodes
202
and
203
are formed using a &pgr;-phase pattern (&phgr;=&pgr;). The distances between the wires are minimized according to the principle of phase-shifting mask exposure.
FIG. 4
is a cross-sectional view taken on line Y
1
-Y
1
′ in FIG.
3
. As shown in
FIG. 4
, a silicon substrate
200
carries on it MOSFETs including a gate oxide film
231
, gate electrodes
211
, high-density impurity regions
210
(source and drain regions), and an isolation oxide film
209
.
On the MOSFETS are a first interlayer insulating film
212
, first-layer wire electrodes
202
,
203
,
204
and
208
; a second interlayer insulating film
213
, and a second-layer wire electrode
206
stacked one upon another. The high-density impurity regions
210
and first-layer wire electrodes
202
and
208
are interconnected by plug electrodes
201
each penetrating through the interlayer insulating film
212
; the first-layer wire electrode
208
and second-layer wire electrode
206
are interconnected by plug electrodes
205
each penetrating through the interlayer insulating film
213
.
SUMMARY OF THE INVENTION
In the above-described conventional example, the first-layer wire electrodes
203
and
204
along line Y
2
-Y
2
′ in
FIG. 3
are arranged to have a 180-degree phase difference therebetween, which ensures a minimum size “a” between the wires. On the other hand, the wire electrodes
202
and
203
have a zero-phase difference between them. Because the phase-shifting principle does not apply to the zero-phase difference, a fine line pattern of high resolution cannot be formed in the latter case. This requires making a distance “b” between the electrodes
202
and
203
greater than the minimum size “a.”
In the inventors' experiments using a krypton fluoride excimer laser (KrF light source), the minimum size “a” measured about 0.16 &mgr;m while the wire-to-wire distance “b” turned out to be as wide as 0.25 &mgr;m. The reason is as follows: the wire electrode
208
is formed in an insular pattern as shown in
FIG. 3
, whereas the wire electrodes
202
and
203
extending in the X direction are in a phase-shifting mask to ensure a 180-degree phase difference between adjacent patterns along the Y
1
-Y
1
′ line. In this setup, an inconsistency occurs in the Levenson arrangement of phase shifters wherein the insular wire electrode
208
is absent along the Y
2
-Y
2
′ line in
FIG. 3. A
similar inconsistency is also observed between the insular electrodes
208
, requiring that the distance “b” therebetween be made greater than the minimum size “a” as illustrated in FIG.
3
.
As described, the patterns used for semiconductor integrated circuit devices are not necessarily applicable to the phase arrangement of 0, &pgr;, 0, &pgr;, etc., in keeping with the phase-shifting principle.
It is therefore a general object of the present invention to provide a semiconductor integrated circuit device to which the phase-shifting principle applies without inconsistency. It is a more specific object of the present invention to provide a semiconductor integrated circuit device offering a phase pattern makeup that excludes mixture of insular and linear patterns as shown in
FIGS. 3 and 4
so as to eliminate inconsistency in the Levenson arrangement of phase shifters.
In carrying out the invention and according to one aspect thereof, there is provided a semiconductor integrated circuit device comprising: a first insulating film; a first conductor penetrating through the first insulating film; first and second wire electrodes patterned on the first insulating film in the same step using a phase-shifting mask; a second insulating film on the first and the second wire electrodes; and a second conductor penetrating through the second insulating film; wherein the first conductor electrically connects at least either the first or the second wire electrodes to either circuit elements or circuit wires located under the first insulating film; wherein the second conductor electrically connects either the first or the second wire electrodes to either circuit elements or circuit wires located on the second insulating film; and wherein, between adjacent first and second wire electrodes, a conductor formed with the first and the second conductor in direct contact is spaced from at least one of the adjacent first and second wire electrodes by a distance less than a minimum distance between the first and the second wire electrodes. What characterizes this structure is that between the linear wire electrode patterns are the first and the second conductor without the presence of an insular wire electrode pattern, i.e., that plug electrodes on and under the wire electrode layer are directly interconnected without the intervention of insular wire electrodes. Where a photomask is fabricated using linear patterns and with no insular pattern, the so-called Levenson arrangement is made possible to which the phase-shifting principle applies with no inconsistency. This enhances the pattern density of a semiconductor integrated circuit device and thus boosts its degree of circuit integration.
In a preferred structure according to the invention, apertures penetrating through the first insulating film constituting the first conductor may each be greater in diameter than apertures penetrating through the second insulating film constituting the second conductor.
In another preferred structure according to the invention, apertures penetrating through the first and the second insulating film constituting the first and the second conductor may be tapered in shape, upper portions of the apertures being made progressively wider than lower portions thereof.
In a further preferred structure according to the invention, the adjacent first and second wire electrodes may be electrically connected to a data line pair of a dynamic RAM.
In an even further preferred structure according to the invention, the adjacent first and second wire electrodes may be patterned using mask patterns having opposite phases; wherein the conductor formed with the first and the second conductor in direct contact may electrically connect either the circuit elements or the circuit wires located under the first insulating film, to either the circuit elements or the circuit wires located on the second insulating film.
In a still further preferred structure according to the invention, the adjacent first and second wire electrodes maybe electrically connected to a data line pair of a dynamic RAM.
In a yet further preferred structure according to the invention, the adjacent first and second wir

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