Semiconductor integrated circuit device

Static information storage and retrieval – Read/write circuit

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Details

365191, 365196, 365205, G11C 700

Patent

active

054901111

ABSTRACT:
A semiconductor integrated circuit device includes a sense amplifier for amplifying the data stored in a memory cell, activated in accordance with a binary output enable signal fed to the integrated circuit device, in order to reduce the power consumption thereof. When the output enable signal is at a first level, in which the output of the integrated circuit device becomes in a floating state after a memory cell is selected to be read out, the sense amplifier is disabled to reduce the power consumption. The sense amplifier is disabled in response to a signal from a control circuit, which produces a logical output signal based on output enable signal and a control signal used to activate the sense amplifier only for the read operation. While the sense amplifier is temporarily disabled, the output of the sense amplifier is latched by a latch circuit, which is also controlled by the output enable signal, to guarantee an output enable access time.

REFERENCES:
patent: 5285414 (1994-02-01), Yamauchi et al.
patent: 5307317 (1994-04-01), Shiraishi et al.
patent: 5313431 (1994-05-01), Uruma et al.
patent: 5323353 (1994-06-01), Griffus et al.
patent: 5384733 (1995-01-01), Sueoka et al.

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