Semiconductor integrated circuit device

Details Semiconductor integrated circuit device Semiconductor integrated circuit device

1998-06-03

1999-10-19

Phan, Trong

Static information storage and retrieval

Read/write circuit

Differential sensing

365208, 365203, G11C 702

Patent

active

059700076

ABSTRACT:
A semiconductor memory device having a sense amplifier, comprises an n-type sense amplifier formed of an nMOS transistor with a source connected to a bit line and a gate connected to an inverted bit line, and an nMOS transistor with a source connected to the inverted bit line and a gate connected to the bit line. In activating the n-type sense amplifier, the voltage of a control signal line is set to a voltage Vss2 lower than a ground voltage Vss. In restoring data in a capacitor of a memory cell, the voltage of the control signal line is set to the ground voltage Vss. With this setting, the sense amplifier can operate at an ultra-low voltage and can ensure a satisfactory operation margin.

REFERENCES:
patent: 5220527 (1993-06-01), Ohsawa
patent: 5267203 (1993-11-01), Hwang et al.
patent: 5572475 (1996-11-01), Yim et al.
patent: 5590080 (1996-12-01), Hasagawa et al.
patent: 5610868 (1997-03-01), Inaba et al.
patent: 5875141 (1999-02-01), Shirley et al.
M. Nakamura et al: 1995 IEEE ISSCC Digest Tech. Papers; FA 14.2: A 29ns 64Mb DRAM with Hierarchical Array Architecture; Feb. 17, 1995; pp. 246-247 .

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