Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1985-04-29
1987-07-14
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Data refresh
365189, G11C 700
Patent
active
046807373
ABSTRACT:
A semiconductor integrated circuit device which constitutes a dynamic RAM has an automatic refresh circuit that contains a refresh timer circuit. The refresh timer circuit has a program element such as a fuse element. The program element is programmed depending upon the data holding characteristics of the dynamic memory cells. Therefore, the refresh period is changed depending upon the characteristics of the dynamic memory cells. According to this construction, the refresh period changes and, as a result, any undesired refresh operation is prevented from being executed, making it possible to reduce the amount of electric power consumed by the circuit device.
REFERENCES:
patent: 4376988 (1983-03-01), Ludwig et al.
M. Taniguchi et al., "M5K 4164S A Refresh Function Incorporated Therein", Denshi Gijutsu, vol. 23, No. 3, pp. 30-33 (publication date not available).
Oishi Kanji
Shinoda Takashi
Hitachi , Ltd.
Popek Joseph A.
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