Semiconductor integrated circuit and test system thereof

Details Semiconductor integrated circuit and test system thereof Semiconductor integrated circuit and test system thereof

2008-06-30

2011-10-04

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S742000

Reexamination Certificate

active

08032803

ABSTRACT:
A semiconductor integrated circuit has a memory collar including a memory cell configured to store a written data pattern and read and output the data pattern, and a register configured to store a failed data pattern, and a built-in self test circuit configured to write the data pattern in the memory cell, output expected value data, and decide whether to continue a test or suspend the test to output failure information to outside, based on a comparison result of the data pattern outputted from the memory cell and the expected value data and a comparison result of the data pattern and the failed data pattern.

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